Added ftrace visualization code

2024-02-17 22:39:46 +00:00 · 2024-02-17 22:39:46 +00:00 · 518f7d1bf5
commit 518f7d1bf5
parent bab62e1974
14 changed files with 1070 additions and 41 deletions
--- a/src/aarch64-linux-flush-dcache/visualizer/.gitignore
+++ b/src/aarch64-linux-flush-dcache/visualizer/.gitignore
@ -0,0 +1,160 @@
+# Byte-compiled / optimized / DLL files
+__pycache__/
+*.py[cod]
+*$py.class
+
+# C extensions
+*.so
+
+# Distribution / packaging
+.Python
+build/
+develop-eggs/
+dist/
+downloads/
+eggs/
+.eggs/
+lib/
+lib64/
+parts/
+sdist/
+var/
+wheels/
+share/python-wheels/
+*.egg-info/
+.installed.cfg
+*.egg
+MANIFEST
+
+# PyInstaller
+#  Usually these files are written by a python script from a template
+#  before PyInstaller builds the exe, so as to inject date/other infos into it.
+*.manifest
+*.spec
+
+# Installer logs
+pip-log.txt
+pip-delete-this-directory.txt
+
+# Unit test / coverage reports
+htmlcov/
+.tox/
+.nox/
+.coverage
+.coverage.*
+.cache
+nosetests.xml
+coverage.xml
+*.cover
+*.py,cover
+.hypothesis/
+.pytest_cache/
+cover/
+
+# Translations
+*.mo
+*.pot
+
+# Django stuff:
+*.log
+local_settings.py
+db.sqlite3
+db.sqlite3-journal
+
+# Flask stuff:
+instance/
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+.scrapy
+
+# Sphinx documentation
+docs/_build/
+
+# PyBuilder
+.pybuilder/
+target/
+
+# Jupyter Notebook
+.ipynb_checkpoints
+
+# IPython
+profile_default/
+ipython_config.py
+
+# pyenv
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+#   intended to run in multiple environments; otherwise, check them in:
+# .python-version
+
+# pipenv
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+#   install all needed dependencies.
+#Pipfile.lock
+
+# poetry
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+#   This is especially recommended for binary packages to ensure reproducibility, and is more
+#   commonly ignored for libraries.
+#   https://python-poetry.org/docs/basic-usage/#commit-your-poetrylock-file-to-version-control
+#poetry.lock
+
+# pdm
+#   Similar to Pipfile.lock, it is generally recommended to include pdm.lock in version control.
+#pdm.lock
+#   pdm stores project-wide configurations in .pdm.toml, but it is recommended to not include it
+#   in version control.
+#   https://pdm.fming.dev/#use-with-ide
+.pdm.toml
+
+# PEP 582; used by e.g. github.com/David-OConnor/pyflow and github.com/pdm-project/pdm
+__pypackages__/
+
+# Celery stuff
+celerybeat-schedule
+celerybeat.pid
+
+# SageMath parsed files
+*.sage.py
+
+# Environments
+.env
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+env/
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+ENV/
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+# Spyder project settings
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+# Rope project settings
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+
+# mkdocs documentation
+/site
+
+# mypy
+.mypy_cache/
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+dmypy.json
+
+# Pyre type checker
+.pyre/
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+# pytype static type analyzer
+.pytype/
+
+# Cython debug symbols
+cython_debug/
+
+# PyCharm
+#  JetBrains specific template is maintained in a separate JetBrains.gitignore that can
+#  be found at https://github.com/github/gitignore/blob/main/Global/JetBrains.gitignore
+#  and can be added to the global gitignore or merged into this file.  For a more nuclear
+#  option (not recommended) you can uncomment the following to ignore the entire idea folder.
+#.idea/
--- a/src/aarch64-linux-flush-dcache/visualizer/README.md
+++ b/src/aarch64-linux-flush-dcache/visualizer/README.md
--- a/src/aarch64-linux-flush-dcache/visualizer/ftrace2pyplot/arguments.py
+++ b/src/aarch64-linux-flush-dcache/visualizer/ftrace2pyplot/arguments.py
@ -0,0 +1,28 @@
+import argparse
+
+parser = argparse.ArgumentParser(
+    prog="ftrace2pyplot",
+    description="Personal use. Visualize ftrace function_graph statistics."
+)
+
+parser.add_argument(
+    "directory", type=str, help="ftrace-cmd output .dat directory"
+)
+
+parser.add_argument(
+    "-g", "--glob", type=bool, help="infer given directory as glob pattern"
+)
+
+parser.add_argument(
+    "-p", "--percentile", type=float, help="clip to <PERCENTILE> in both ends",
+    default=1.
+)
+
+parser.add_argument(
+    "-l", "--use-log-scale", type=bool, help="use logarithmic scale (log10)",
+    default=False
+)
+
+parser.add_argument(
+    "--output", "-o", type=str, help="output file", default="out.pdf"
+)
--- a/src/aarch64-linux-flush-dcache/visualizer/ftrace2pyplot/main.py
+++ b/src/aarch64-linux-flush-dcache/visualizer/ftrace2pyplot/main.py
@ -0,0 +1,119 @@
+from os import path
+from argparse import Namespace
+import glob
+from typing import List, Tuple, Union
+import re
+
+import trappy
+import pandas as pd
+import numpy as np
+import seaborn as sns
+import matplotlib.pyplot as plt
+
+from arguments import parser
+
+def parse_basename_into_byte_count(basename: str) -> int:
+    ret: int = -1
+
+    regex = re.compile(r"(?P<size>[0-9]+)(?P<unit>[kmgKMG])")
+    pat = regex.search(basename)
+    if pat is not None:
+        size = int(pat.group("size"))
+        match pat.group("unit"):
+            case "K": ret = size
+            case "M": ret = size * 1024
+            case "G": ret = size * 1024 * 1024
+            case _:
+                raise Exception("Unexpected unit \"{}\".".format(pat.group("unit")))
+
+    return ret
+
+def clip_to(
+        dataset: Union[pd.Series, pd.DataFrame],
+        percentile: float,
+        axis: int = None
+) -> Union[pd.Series, pd.DataFrame]:
+    assert(0 <= percentile <= 1)
+    if percentile == .0:
+        return dataset
+
+    lower_bound = dataset.quantile(1 - percentile)
+    upper_bound = dataset.quantile(percentile)
+
+    if isinstance(dataset, pd.DataFrame):
+        clipped = dataset.clip(lower=lower_bound, upper=upper_bound, axis=axis)
+    else:
+        clipped = dataset.clip(lower=lower_bound, upper=upper_bound)
+
+    return clipped
+
+def parse_function_graph_ftrace(trace_fpath: str):
+    trace = trappy.FTrace(trace_fpath)
+    fngraph_df: pd.DataFrame = trace.funcgraph_exit.data_frame
+    assert fngraph_df is not None
+
+    # Sieve `__dcache_clean_poc` entries
+    # Notably, the long ones are mostly preempted by e.g., softirq (rcu, etc.)
+    # I should prob. identify them but whatever
+    # Other long ones that are NOT preempted may be due to QEMU process
+    # scheduling on host, not sure
+    fngraph_df = fngraph_df.loc[fngraph_df["func"] == "__dcache_clean_poc"]
+
+    # Compute runtime of function
+    fngraph_df.loc[:, "rettime"] = (fngraph_df["rettime"]
+        .astype(str)
+        .apply(lambda x: int(x, base=16)))
+    fngraph_df.loc[:, "calltime"] = (fngraph_df["calltime"]
+        .astype(str)
+        .apply(lambda x: int(x, base=16)))
+    fngraph_df = fngraph_df.assign(
+        runtime = fngraph_df["rettime"] - fngraph_df["calltime"])
+
+    print("Shape: {}; head: \n{}".format(fngraph_df.shape, fngraph_df.head()))
+    return fngraph_df
+
+def main(args: Namespace):
+    # Load dataset -- each should have good 1000 entries
+    ftrace_dat_paths: List[str] = []
+    ftrace_dfs: List[Tuple(int, pd.DataFrame)] = []
+    if args.glob:
+        ftrace_dat_paths = glob.glob(args.directory)
+    else:
+        ftrace_dat_paths = glob.glob(args.directory + "/*.dat")
+
+    for ftrace_dat_path in ftrace_dat_paths:
+        print("Loading \"{}\"...".format(ftrace_dat_path))
+        fngraph_df = parse_function_graph_ftrace(ftrace_dat_path)
+        size_in_kb = parse_basename_into_byte_count(
+            str(path.basename(ftrace_dat_path).split(".")[:-1]))
+        ftrace_dfs.append((size_in_kb, fngraph_df))
+
+    ftrace_dfs.sort(key=lambda tp: tp[0])
+
+    # Now we have filename-df pairs, combine into single df
+    series = [
+        clip_to(
+            pd.to_numeric(df.reset_index()["runtime"]).apply(lambda x: x / 1e3),
+            args.percentile
+        ) for _, df in ftrace_dfs
+    ]
+    indices = [size for size, _ in ftrace_dfs]
+    plot_df = pd.concat(series, axis=1, keys=indices) # In long-form
+    print("Plot shape: {}; head: \n{}"
+        .format(plot_df.shape, plot_df.head()))
+
+    # plot violin plot
+    fig, ax = plt.subplots(figsize=(12, 8))
+    sns.violinplot(
+        data=plot_df, orient="h", fill=False, log_scale=args.use_log_scale)
+    ax.set_xlabel("Runtime (μs)")
+    ax.set_ylabel("Write amount (KiB)")
+    ax.set_title("Percentile: {}{}"
+        .format(args.percentile, ", log scale" if args.use_log_scale else ""))
+    fig.savefig(args.output)
+    plt.show()
+
+if __name__ == "__main__":
+    args = parser.parse_args()
+    sns.set_theme(context="talk", style="ticks", rc={"axes.grid": True})
+    main(args)
--- a/src/aarch64-linux-flush-dcache/visualizer/out-95p.pdf
+++ b/src/aarch64-linux-flush-dcache/visualizer/out-95p.pdf
--- a/src/aarch64-linux-flush-dcache/visualizer/out-log.pdf
+++ b/src/aarch64-linux-flush-dcache/visualizer/out-log.pdf
--- a/src/aarch64-linux-flush-dcache/visualizer/out.pdf
+++ b/src/aarch64-linux-flush-dcache/visualizer/out.pdf
--- a/src/aarch64-linux-flush-dcache/visualizer/poetry.lock
+++ b/src/aarch64-linux-flush-dcache/visualizer/poetry.lock
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--- a/src/aarch64-linux-flush-dcache/visualizer/pyproject.toml
+++ b/src/aarch64-linux-flush-dcache/visualizer/pyproject.toml
@ -0,0 +1,17 @@
+[tool.poetry]
+name = "ftrace2pyplot"
+version = "0.1.0"
+description = ""
+authors = ["Z.Chen <Z.Chen-103@sms.ed.ac.uk>"]
+readme = "README.md"
+
+[tool.poetry.dependencies]
+python = "^3.11"
+matplotlib = "^3.8.3"
+seaborn = "^0.13.2"
+trappy = "^6.0.1"
+
+
+[build-system]
+requires = ["poetry-core"]
+build-backend = "poetry.core.masonry.api"
--- a/src/aarch64-linux-flush-dcache/visualizer/tests/init.py
+++ b/src/aarch64-linux-flush-dcache/visualizer/tests/init.py
--- a/tex/misc/background_draft.bib
+++ b/tex/misc/background_draft.bib
@ -323,3 +323,36 @@
  year={2014}
 }

+@inproceedings{Ma_etal.SHM_FPGA.2020,
+  title={A hypervisor for shared-memory FPGA platforms},
+  author={Ma, Jiacheng and Zuo, Gefei and Loughlin, Kevin and Cheng, Xiaohe and Liu, Yanqiang and Eneyew, Abel Mulugeta and Qi, Zhengwei and Kasikci, Baris},
+  booktitle={Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems},
+  pages={827--844},
+  year={2020}
+}
+
+@inproceedings{Khawaja_etal.AmorphOS.2018,
+  title={Sharing, Protection, and Compatibility for Reconfigurable Fabric with $\{$AmorphOS$\}$},
+  author={Khawaja, Ahmed and Landgraf, Joshua and Prakash, Rohith and Wei, Michael and Schkufza, Eric and Rossbach, Christopher J},
+  booktitle={13th USENIX Symposium on Operating Systems Design and Implementation (OSDI 18)},
+  pages={107--127},
+  year={2018}
+}
+
+@misc{Ven.LKML_x86_DMA.2008,
+  title={Background on ioremap, cacheing, cache coherency on x86},
+  url={https://lkml.org/lkml/2008/4/29/480},
+  journal={lkml.org},
+  author={Ven, Arjan van de},
+  year={2008},
+  month={Apr}
+}
+
+@inproceedings{Li_etal.RelDB_RDMA.2016,
+  title={Accelerating relational databases by leveraging remote memory and RDMA},
+  author={Li, Feng and Das, Sudipto and Syamala, Manoj and Narasayya, Vivek R},
+  booktitle={Proceedings of the 2016 International Conference on Management of Data},
+  pages={355--370},
+  year={2016}
+}
+
--- a/tex/misc/background_draft.pdf
+++ b/tex/misc/background_draft.pdf
--- a/tex/misc/background_draft.tex
+++ b/tex/misc/background_draft.tex
@ -9,10 +9,11 @@
 Though large-scale cluster systems remain the dominant solution for request and
 data-level parallelism \cite{BOOK.Hennessy_Patterson.CArch.2011},
 there have been a resurgence towards applying HPC techniques (e.g., DSM) for more
-efficient heterogeneous computation with more tightly-coupled heterogeneous nodes
-providing (hardware) acceleration for one another \cite{Cabezas_etal.GPU-SM.2015}
-\textcolor{red}{[ADD MORE CITATIONS]} Orthogonally, within the scope of one
-motherboard, \emph{heterogeneous memory management (HMM)} enables the use of
+efficient heterogeneous computation with tighter-coupled heterogeneous nodes
+providing (hardware) acceleration for one another
+\cites{Cabezas_etal.GPU-SM.2015}{Ma_etal.SHM_FPGA.2020}{Khawaja_etal.AmorphOS.2018}
+Orthogonally, within the scope of one motherboard,
+\emph{heterogeneous memory management (HMM)} enables the use of
 OS-controlled, unified memory view across both main memory and device memory
 \cite{WEB.NVIDIA.Harris.Unified_Memory_CUDA.2017}, all while using the same libc
 function calls as one would with SMP programming, the underlying complexities of
@ -50,11 +51,46 @@ This thesis paper builds upon an ongoing research effort in implementing a
 tightly coupled cluster where HMM abstractions allow for transparent RDMA access
 from accelerator nodes to local data and migration of data near computation,
 leveraging different consistency model and coherency protocols to amortize the
-communication cost for shared data. \textcolor{red}{
-Specifically, this thesis explores the effect of memory consistency model and
-coherency protocol on memory-sharing between cluster nodes }
+communication cost for shared data. More specifically, this thesis explores the
+following:

-\textcolor{red}{The rest of the chapter is structured as follows\dots}
+\begin{itemize}
+    \item {
+        The effect of cache coherency maintenance, specifically OS-initiated,
+        on RDMA programs.
+    }
+    \item {
+        Implementation of cache coherency in cache-incoherent kernel-side RDMA
+        clients.
+    }
+    \item {
+        Discussion of memory models and coherence protocol designs for a
+        single-writer, multi-reader RDMA-based DSM system.
+    }
+\end{itemize}
+
+The rest of the chapter is structured as follows:
+\begin{itemize}
+    \item {
+        We identify and discuss notable developments in software-implemented
+        DSM systems, and thus identify key features of contemporary advancements
+        in DSM techniques that differentiate them from their predecessors.
+    }
+    \item {
+        We identify alternative (shared memory) programming paradigms and
+        compare them with DSM, which sought to provide transparent shared
+        address space among participating nodes.
+    }
+    \item {
+        We give an overview of coherency protocol and consistency models for
+        multi-sharer DSM systems.
+    }
+    \item {
+        We provide a primer to cache coherency in ARM64 systems, which
+        \emph{do not} guarantee cache-coherent DMA,
+        as opposed to x86 systems \cite{Ven.LKML_x86_DMA.2008}.
+    }
+\end{itemize}

 \section{Experiences from Software DSM}
 A majority of contributions to software DSM systems come from the 1990s
@ -81,9 +117,9 @@ New developments in network interfaces provides much improved bandwidth and late
 compared to ethernet in the 1990s. RDMA-capable NICs have been shown to improve
 the training efficiency sixfold compared to distributed \textit{TensorFlow} via RPC,
 scaling positively over non-distributed training \cite{Jia_etal.Tensorflow_over_RDMA.2018}.
-Similar results have been observed for \textit{APACHE Spark}\cite{Lu_etal.Spark_over_RDMA.2014}
-\textcolor{red}{and what?}. Consequently, there have been a resurgence of interest
-in software DSM systems and programming models
+Similar results have been observed for APACHE Spark \cite{Lu_etal.Spark_over_RDMA.2014}
+and SMBDirect \cite{Li_etal.RelDB_RDMA.2016}. Consequently, there have been a
+resurgence of interest in software DSM systems and programming models
 \cites{Nelson_etal.Grappa_DSM.2015}{Cai_etal.Distributed_Memory_RDMA_Cached.2018}.

 % Different to DSM-over-RDMA, we try to expose RDMA as device with HMM capability
@ -108,10 +144,10 @@ of the DSM system.

 Perhaps most importantly, experiences from Munin show that \emph{restricting the
 flexibility of programming model can lead to more performant coherence models}, as
-\textcolor{teal}{corroborated} by the now-foundational
-\textit{Resilient Distributed Database} paper \cite{Zaharia_etal.RDD.2012} --
-which powered many now-popular scalable data processing frameworks such as
-\textit{Hadoop MapReduce}\cite{WEB.APACHE..Apache_Hadoop.2023} and
+exhibited by the now-foundational \textit{Resilient Distributed Database} paper
+\cite{Zaharia_etal.RDD.2012} which powered many now-popular scalable data
+processing frameworks such as \textit{Hadoop MapReduce}
+\cite{WEB.APACHE..Apache_Hadoop.2023} and
 \textit{APACHE Spark} \cite{WEB.APACHE..Apache_Spark.2023}. ``To achieve fault
 tolerance efficiently, RDDs provide a restricted form of shared memory
 [based on]\dots transformations rather than\dots updates to shared state''
@ -227,7 +263,7 @@ network has been made apparent since the 1980s, predominant approaches to
        \cite{AST_Steen.Distributed_Systems-3ed.2017}. This implies
        manual/controlled data sharding over nodes, separation of compute and
        communication ``stages'' of computation, etc., which benefit performance
-        analysis.
+        analysis and engineering.
    }
    \item {
        Enterprise applications value throughput and uptime of relatively
@ -250,7 +286,6 @@ as backends to provide the PGAS model over various network interfaces/platforms
 (e.g., Ethernet and Infiniband)\cites{WEB.LBNL.UPC_man_1_upcc.2022}
 {WEB.HPE.Chapel_Platforms-v1.33.2023}.

-Examples of PGAS programming languages and models include \textcolor{red}{\dots}.
 Notably, implementation of a \emph{global} address space across machines on top
 of machines already equipped with their own \emph{local} address space (e.g.,
 cluster nodes running commercial Linux) necessitates a global addressing
@ -263,7 +298,7 @@ allocating node's memory, but registered globally. Consequently, a single global
 pointer is recorded in the runtime with corresponding permission flags for the
 context of some user-defined group of associated nodes. Comparatively, a
 \textit{collective} PGAS object is allocated such that a partition of the object
-(i.e., a subarray of the repr) is stored in each of the associated node -- for
+(i.e., a sub-array of the repr) is stored in each of the associated node -- for
 a $k$-partitioned object, $k$ global pointers are recorded in the runtime each
 pointing to the same object, with different offsets and (naturally)
 independently-chosen virtual addresses. Note that this design naturally requires
@ -272,33 +307,36 @@ cannot be re-addressed to a different virtual address i.e., the global pointer
 that records the local virtual address cannot be auto-invalidated.

 Similar schemes can be observed in other PGAS backends/runtimes, albeit they may
-opt to use a map-like data structure for addressing instead. In general, PGAS
-backends differ from DSM systems in that, despite providing memory management
-over remote nodes, they provide no transparent caching and transfer of remote
-memory objects accessed by local nodes. The programmer is still expected to
-handle data/thread movement manually when working with shared memory over network
-to maximize performance metrics of interest.
+opt to use a map-like data structure for addressing instead. In general, despite
+both PGAS and DSM systems provide memory management over remote nodes, PGAS
+frameworks provide no transparent caching and transfer of remote memory objects
+accessed by local nodes. The programmer is still expected to handle data/thread
+movement manually when working with shared memory over network to maximize
+their performance metrics of interest.

-\dots
-
-Improvement in NIC bandwidth and transfer rate benefits DSM applications that expose
-global address space, and those that leverage single-writer capabilities over hierarchical memory nodes. \textbf{[GAS and PGAS (Partitioned GAS)
-technologies for example Openshmem, OpenMPI, Cray Chapel, etc. that leverage
-specially-linked memory sections and \texttt{/dev/shm} to abstract away RDMA access]}.
+\subsection{Message Passing}


-Contemporary works on DSM systems focus more on leveraging hardware advancements
-to provide fast and/or seamless software support. Adrias \cite{Masouros_etal.Adrias.2023},
-for example, implements a complex system for memory disaggregation over multiple
-compute nodes connected via the \textit{ThymesisFlow}-based RDMA fabric, where
-they observed significant performance improvements over existing data-intensive
-processing frameworks, for example APACHE Spark, Memcached, and Redis, over
-no-disaggregation (i.e., using node-local memory only, similar to cluster computing)
-systems.
+% \dots

-\subsection{Programming Model}
+% Improvement in NIC bandwidth and transfer rate benefits DSM applications that expose
+% global address space, and those that leverage single-writer capabilities over hierarchical memory nodes. \textbf{[GAS and PGAS (Partitioned GAS)
+% technologies for example Openshmem, OpenMPI, Cray Chapel, etc. that leverage
+% specially-linked memory sections and \texttt{/dev/shm} to abstract away RDMA access]}.

-\subsection{Move Data to Process, or Move Process to Data?}
+
+% Contemporary works on DSM systems focus more on leveraging hardware advancements
+% to provide fast and/or seamless software support. Adrias \cite{Masouros_etal.Adrias.2023},
+% for example, implements a complex system for memory disaggregation over multiple
+% compute nodes connected via the \textit{ThymesisFlow}-based RDMA fabric, where
+% they observed significant performance improvements over existing data-intensive
+% processing frameworks, for example APACHE Spark, Memcached, and Redis, over
+% no-disaggregation (i.e., using node-local memory only, similar to cluster computing)
+% systems.
+
+% \subsection{Programming Model}
+
+\subsection{Data to Process, or Process to Data?}
 (TBD -- The former is costly for data-intensive computation, but the latter may
 be impossible for certain tasks, and greatly hardens the replacement problem.)

--- a/tex/misc/discussion_draft.tex
+++ b/tex/misc/discussion_draft.tex